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Silicon Labs /EFR32FG23A010F512GM48 /RAC_S /IFADCPLLEN

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Interpret as IFADCPLLEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (disable)IFADCPLLENBBDET 0 (disable)IFADCPLLENBBXLDET 0 (disable)IFADCPLLENBBXMDET 0 (disable)IFADCPLLENCFDET 0 (disable)IFADCPLLENROTDET 0 (disable)IFADCPLLSERIEREGENABLE 0 (disable)IFADCPLLSHUNTREGENABLE 0 (disable)IFADCPLLENREFBUF 0 (disable)IFADCPLLENXOBYP

IFADCPLLENBBDET=disable, IFADCPLLENREFBUF=disable, IFADCPLLENBBXLDET=disable, IFADCPLLENBBXMDET=disable, IFADCPLLSHUNTREGENABLE=disable, IFADCPLLSERIEREGENABLE=disable, IFADCPLLENCFDET=disable, IFADCPLLENXOBYP=disable, IFADCPLLENROTDET=disable

Description

No Description

Fields

IFADCPLLENBBDET

IFADCPLLENBBDET

0 (disable): undefined

1 (enable): undefined
IFADCPLLENBBXLDET

IFADCPLLENBBXLDET

0 (disable): undefined

1 (enable): undefined
IFADCPLLENBBXMDET

IFADCPLLENBBXMDET

0 (disable): undefined

1 (enable): undefined
IFADCPLLENCFDET

IFADCPLLENCFDET

0 (disable): undefined

1 (enable): undefined
IFADCPLLENROTDET

IFADCPLLENROTDET

0 (disable): undefined

1 (enable): undefined
IFADCPLLSERIEREGENABLE

IFADCPLLSERIEREGENABLE

0 (disable): undefined

1 (enable): undefined
IFADCPLLSHUNTREGENABLE

IFADCPLLSHUNTREGENABLE

0 (disable): undefined

1 (enable): undefined
IFADCPLLENREFBUF

IFADCPLLENREFBUF

0 (disable): undefined

1 (enable): undefined
IFADCPLLENXOBYP

IFADCPLLENXOBYP

0 (disable): undefined

1 (enable): undefined

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data